Multi-core microprocessor (MCP) chips comprise a plurality of independent digital signal processor (DSP) cores on one single integrated circuit (IC) chip package, and are useful and efficient structures for central processing unit (CPU) and System-on-a-chip or System on Chip (SoC or SOC) applications. The provision of pluralities of individual instruction processing cores enables higher computation capacity relative to single processor chip structures. Computer systems incorporating MCP's usually consume less power and have a lower cost and higher reliability than alternative multi-chip systems, as well as provide assembly cost advantages by requiring fewer physical system components.
MCP's must be tested in order to assure that a given MCP meets expected or required performance specifications. Problems arise when individual cores on an MCP have different performance characteristics in response to similar input and operating environments, for example due to with-in chip process variations. More particularly, one or more cores may fail an individual core performance requirement that the remainder pass, and failure of only one core will cause an entire MCP structure to fail prior art MCP configuration and/or testing methodologies even if most or all of the rest perform within specifications.
Thus there is a need for improved testing methods and systems for evaluating and increasing manufacturing yields from MCP chip designs and implementations that account for within-chip processor process and performance variations.